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shr/sar/rcr

Shift right shifts the accumulator one bit to the right, filling the most significant bit with a 0. Shift arithmetic right works the same except that it preserves the most significant bit. Rotate though carry right also shifts the accumulator one bit to the right but fills the most significant bit with the carry flag.

The three instructions shift the least significant bit into the carry flag. The other flags are set according to an add instruction for shl and an or 0x00 for shr.

InstructionEncodingSemanticsCycles
rcr00 001 000(acc[7],acc[0:6],CF)←(CF,acc[1:7],acc[0])(\mathit{acc}[7], \mathit{acc}[0:6], \mathit{CF}) \gets (\mathit{CF}, \mathit{acc}[1:7], \mathit{acc}[0])3
shr00 010 000(acc[7],acc[0:6],CF)←(0,acc[1:7],acc[0])(\mathit{acc}[7], \mathit{acc}[0:6], \mathit{CF}) \gets (0, \mathit{acc}[1:7], \mathit{acc}[0])3
sar00 011 000(acc[7],acc[0:6],CF)←(acc[7],acc[1:7],acc[0])(\mathit{acc}[7], \mathit{acc}[0:6], \mathit{CF}) \gets (\mathit{acc}[7], \mathit{acc}[1:7], \mathit{acc}[0])3

The assembler also defines shl and rcl. However, these are only pseudo-instructions. shl is equivalent to add acc, acc, rcl to adc acc, acc.