and

The and instructions compute a bitwise and as shown in the table below. All flags are updated accordingly. Note that the carry and overflow flags are set iff (lhs & rhs)==0xff & carry_in==1 due to jankiness of the 74382's and function mode.

Instruction	Encoding	Semantics	Cycles
and acc, reg8	01 100 rrr	$\mathit{acc} \gets \mathit{acc}~\mathrm{AND}~\mathit{reg8}$	3/41/52
and acc, imm8	00 100 011 imm8	$\mathit{acc} \gets \mathit{acc}~\mathrm{AND}~\mathit{imm8}$	3

1. 4 cycles for unprefixed and acc, [pi]
2. 5 cycles for and acc, [pi] with prefix_a16 (the sequence prefix_a16; and acc, [pi] takes 6 cycles)